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CS Seminar: Quantum Computer Security: from NISQ to FTQC (Jakub Szefer)

Wednesday, April 15, 2026 | 12:00 PM - 1:00 PM CT
Mudd Hall ( formerly Seeley G. Mudd Library), 3514, 2233 Tech Drive, Evanston, IL 60208 map it

Wednesday / CS Seminar
April 15 / 12:00 PM
Hybrid / Mudd 3514

Speaker
Jakub Szefer, Northwestern University

Talk Title
Quantum Computer Security: from NISQ to FTQC

Abstract
Research on quantum computer security has been advancing and gaining attention since early 2020s. Much of the early work at the beginning of this decade focused on NISQ (Noisy-Intermediate Scale Quantum) which became easily accessible via the internet. Cloud-based quantum computing brough promise of accessibility to many users who do not have a physical quantum computer, but also opened many new threat models and possible security attacks. As quantum computing is now transitioning to FTQC (Fault-Tolerant Quantum Computing) our recent research has explored yet new threat models and security attacks in the emergent FTQC paradigm. This talk will, in the first half, overview key results from NISQ quantum computer security research and present the brief, but very active, history of NISQ quantum security. In the second half, the talk will focus on the most recent work on FTQC security, and the Trace-Based Reconstruction of Quantum Circuit Dataflow in Surface Codes work recently presented at the HPCA conference. The talk will highlight the research results as well as the larger challenges and opportunities in security of quantum computing as we move to the FTQC era.

Biography
Jakub Szefer is an Associate Professor in the Electrical and Computer Engineering Department at Northwestern University where he leads the Computer Architecture and Security Lab (CASLAB). His research focuses on security attacks and defenses at the computer architecture and hardware levels of computer systems. His work encompasses security of processor architectures, reconfigurable logic, post-quantum cryptographic accelerators, and quantum computers. He is the author of the “Principles of Secure Processor Architecture Design” book, published in 2018, and co-editor of the “Security of FPGA-Accelerated Cloud Computing Environments” book, published in 2023. He received his BS degree with highest-honors in Electrical and Computer Engineering from University of Illinois at Urbana-Champaign, and MA and PhD degrees in Electrical Engineering from Princeton University.

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Zoom Link
Panopto Link

Cost: free

Audience

  • Faculty/Staff
  • Student
  • Post Docs/Docs
  • Graduate Students

Contact

Wynante R Charles
(847) 467-8174
Email

Interest

  • Academic (general)

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